# dom

**Repository Path**: opendacs/dom

## Basic Information

- **Project Name**: dom
- **Description**: A prototype technology mapper for dual-output LUTs.
- **Primary Language**: Unknown
- **License**: MIT
- **Default Branch**: preview
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 5
- **Forks**: 0
- **Created**: 2021-10-15
- **Last Updated**: 2025-06-23

## Categories & Tags

**Categories**: chips

**Tags**: None

## README


# Overview
A framework for dual-output LUT mapping.


## How To Use

### Compilation

```
make
```

### Execution

```
./bin/DOLM <benchamrk-set> <benchmark-name>
```

Example:
```
./bin/DOLM EPFL adder
```

### Interpretation of the Results

`*.blif_abc_lut.blif.out` is the result from berkeley-abc.

`*.blif.out1` is the single-output result.

`*.blif.out2` is the dual-output result.

### Reference

```
@inproceedings{wang2020dom,
  title={Dual-Output LUT Merging during FPGA Technology Mapping},
  author={Wang, Feng and Zhu, Liren and Zhang, Jiaxi and Li, Lei and Zhang, Yang and Luo, Guojie},
  booktitle={Proceedings of the 39th International Conference on Computer-Aided Design},
  pages={1--9},
  year={2020},
}
```