# iATPG

**Repository Path**: oscc-project/iATPG

## Basic Information

- **Project Name**: iATPG
- **Description**: Automatic test pattern generation and fault simulation tool, support combination, full scan and partial scan netlist.
- **Primary Language**: C++
- **License**: MulanPSL-2.0
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 6
- **Forks**: 1
- **Created**: 2025-03-03
- **Last Updated**: 2025-03-19

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# iATPG: Automatic Test Pattern Generation

## Compile and Run
- compile
```
    mkdir build && cd build
    cmake ..
    make
```
- run by tcl command
```
    ./bin/iATPG
```

- run by script file
```
    ./bin/iATPG ./script/script_file
```

- output files
```
    ./src/operation/iATPG/output/stil_pattern -> generated patterns
    ./src/operation/iATPG/output/fault_list -> different class fault list
```

- run test gen example
```
    cd iATPG
    ./bin/iATPG ./script/test_gen/s27_partial_scan.tcl
```

- run fault sim example
```
    cd iATPG
    ./bin/iATPG ./script/fault_sim/s27_partial_scan.tcl
```

## Environment Requisites
- prerequisites
```
    Operating System: Linux
    Compiler: Support std C++ 20
    Other libraries: glog, gflags, boost, flex, bison, OpenMP, NUMA, tcl
```

- requisites installation example
```
    sudo apt-get update
    sudo apt-get install -y g++-10 libgoogle-glog-dev libgflags-dev libunwind-dev libboost-all-dev flex bison libomp-dev libnuma-dev tcl-dev
```

## Acknowledgement
In the development of iATPG, some sub-modules from the open-source community are employed. All relevant usage is listed below.

- abseil, [Google abseil](https://github.com/abseil/abseil-cpp.git), Use Google's high performance C++ container and algorithm library to improve performance compared to STL.

- json, [JSON for Modern C++](https://github.com/nlohmann/json), Json C++ library, used to parse the program Json configuration file.

- vcd parser, [ben-marshall verilog-vcd-parser](https://github.com/ben-marshall/verilog-vcd-parser.git), Parse power VCD waveform file.

- verilog parser, [OpenROAD/OpenSTA/verilog](https://github.com/The-OpenROAD-Project/OpenSTA/tree/master/verilog), parse netlist file.

- utility, [iEDA](https://gitee.com/oscc-project/iEDA), utility head files.

## Discussion
- Create issue in repo
- Contact linxiaoze96@gmail.com

## License
iATPG, automatic test pattern generation

Copyright (c) 2025-2027 Pengcheng Laboratory

Copyright (c) 2025-2027 Institute of Computing Technology, Chinese Academy of Sciences

Copyright (c) 2025-2027 Beijing Institute of Open Source Chip

iATPG is licensed under Mulan PSL v2.
You can use this software according to the terms and conditions of the Mulan PSL v2.
You may obtain a copy of Mulan PSL v2 at:
http://license.coscl.org.cn/MulanPSL2

THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.

See the Mulan PSL v2 for more details.